The industry organization MIPI Alliance announced a major update to the MIPI D-PHY specification, which describes the physical layer interface for connecting high-definition cameras and displays to application processors. Version 3.0 doubles the data rate of the standard D-PHY channel while improving power efficiency.
More precisely, the maximum speed of D-PHY v3.0 reached 9 Gbps for a standard channel and 11 Gbps for a short one. To improve energy efficiency in D-PHY v3.0, a CTLE (Continuous-Time Linear Equalizer) block has been added on the receiver side. Note that the D-PHY v3.0 interface is fully compatible with previous versions of the MIPI specification.
Like the first version of MIPI PHY introduced over 15 years ago, the new version is primarily intended for smartphones, tablets, CCTV cameras, IoT devices, car cameras and displays.
In introducing D-PHY v3.0, the MIPI Alliance also introduced a new version of another physical layer interface, C-PHY, which uses character encoding. The C-PHY 2.1 specification adds support for 6 Gbps, which is equivalent to 13.7 Gbps, over a standard link and 8 Gbps over a short link. The new 64-bit PHY protocol interface (PPI) in version 2.1 provides a wider bus between the C-PHY and the main logic to better support high-performance applications. The new version of the interface is fully compatible with previous versions of C-PHY.
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