RISC-V chips begin to impact high performance

At the 2022 RISC-V China Summit, Meng Jianyi, Chairman of the RISC-V China Summit and Vice President of Pingtou Ge Semiconductor, reviewed RISC-V's progress in ecological construction in the past year.

The International Foundation has deployed more than 70 technical groups to customize technical standards; more than 160 processor cores for various fields, and the penetration rate of various industries is getting deeper and deeper; the SPECint performance exceeded 10 points for the first time, entering the ranks of high-performance computing; more than 3,100 members home, a 130% increase from 2021.

With the gradual improvement of RISC-V technology and ecology, RISC-V has also achieved some landmark results in application in the past year.

The application scale of RISC-V processors in IoT exceeds 10 billion, of which Chinese companies' shipments account for 50%; Clockwork released the first RISC-V-based portable computer;

Pingtou Ge released the first high-performance RISC-V chip platform Wujian 600, which supports 4-core high-performance RISC-V processors with a main frequency of up to 2.5GHz, and also launched the SoC prototype Shadow 1520. At the same time, Yuefang Technology and Saifang Technology also launched high-end application chips with a main frequency of over 1.5GHz, filling the gap in the high-performance field of RISC-V.

The industry is using actions to prove that high performance is no longer a taboo for RISC-V, and the development of high performance is an inevitable trend of RISC-V development. However, in order to further compete with x86 and Arm in the high-performance field, there are still two Big problems await RISC-V

The processor performance needs to be strengthened, and the software adaptation needs to be improved

RISC-V, which is developing towards high performance, will face many challenges from processors and software. On the one hand, the RISC-V processor itself needs to achieve breakthroughs in performance while maintaining stability. On the other hand, there are also some basic software adaptations. The puzzle is unsolved. 

"Only when the processor performance is improved can it be adapted to a variety of software." Meng Jianyi said: "In addition, the stability of the processor is also very important. Stability is the basis for software migration in complex application scenarios."

In terms of software, Wu Yanjun, chief engineer of the Institute of Software, Chinese Academy of Sciences, bluntly said that although the international upstream open source community, the domestic open source Euler community, and Pingtou Ge, where the software of the Chinese Academy of Sciences is located, have done a lot of RISC-V basic software adaptation work, but there are still many cores. The underlying software does not run smoothly on the RISC-V platform.

"There may be a lot of problems with immature instruction set specifications, because many basic software packages run on X86 and Arm before. From the perspective of maintainers and the community, RISC-V has not been regarded as Tire-1. Or First-Class-Citizen. There are conceptual issues, investment issues, and commercial interest returns." Wu Yanjun explained.

Because of this, the Institute of Software of the Chinese Academy of Sciences, as an institution of the National Academy of Sciences, has been committed to porting the basic software that supports high performance and leads future ecological development to the RISC-V architecture, paving the way for commercial development, but still encounters some problems. 

For example, after porting the basic software to the RISC-V verification platform, debugging in the simulator environment is very inefficient. "Brother Pingtou released a high-performance RISC-V full-stack chip platform, which will provide a very good acceleration for the high-performance migration of basic software in the future." Wu Yanjun sighed.

In addition, the licensing issue of peripheral IP that developers care about is still difficult to break through in the short term, and it is also a major stumbling block on the road to the development of high-performance RISC-V.

However, Wu Yanjun said that the RISC-V Foundation Council is trying to explore the road that open source software has traveled. Open source software also encountered patent lawsuits in the initial development stage. In order to solve this problem, IBM, Intel, the Linux Foundation and the Free Software Foundation launched an organization called "Open Invention Network (OIN)" to form a patent pool. , All institutions that join the OIN organization need to sign a corresponding agreement to give up their claims on related patents and jointly defend against external patent litigation.

"If RISC-V can also form such a model in the future, the obstacles to peripheral IP patents may be cleared one by one. But after all, basic software and semiconductor industries are different, and the semiconductor industry has a longer history of patent layout and profitability. Some, there will be more obstacles and barriers, which may be much more difficult than software." Wu Yanjun told Leifeng.com (public account: Leifeng.com).

Meng Jianyi also said that when Pingtou is developing Wujian 600, he will choose domestic IP according to actual needs to jointly promote the RISC-V ecological construction.

Only higher-performance RISC-V hardware can support the adaptation of more software, and the adaptation of more software can allow RISC-V to develop into a higher-performance field.

High-performance RISC-V "breeds" multi-core heterogeneous

Since most application scenarios now require parallel computing, whether in the x86 or Arm world, heap cores are used to improve performance, and some AI application processor cores even reach thousands. The flat-headed brother Wujian 600 supports 4 RISC-V processor cores. Will RISC-V also improve processor performance by stacking cores?

"The multi-core architecture has certain advantages, but it cannot be generalized. In some scenarios and applications, a single-core processor with higher performance is also required." Meng Jianyi said.

Wu Yanjun agreed with this view and said that with RISC-V, there are more heterogeneous options at the core level.

"Before we talked about heterogeneous multi-core computing, in fact, it still depends on the specifications of processor manufacturers or instruction set manufacturers, such as ARM's large core and small core, and some extended instruction sets like X86. If the RISC-V ecosystem reaches a certain level , we may not describe a computing platform in a general way as it is now by saying how many cores, how many Hz of main frequency, how many TOPS of computing power, and how much power consumption. It may be said how many cores of the same type, each What customization capabilities do the cores have. These different types of cores are integrated into a platform, packaged in a machine, and have a variety of processing capabilities to meet the needs of different scenarios.” Wu Yanjun said.

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