Recently, Innodata released the first self-developed EDA tool - EnFortius Low Power Checker (LPC for short), LPC is mainly used for static verification of low-power design and can be used for integrated circuits. (IC) Engineers quickly locate possible design vulnerabilities and flaws introduced by low-power designs.
Innodata EnFortius series of tools are designed to solve the low-power design problems faced by chip design engineers, and the LPC released this time is the first tool in the series. Years ago, in response to the need for low-power designs, the industry developed a design standard for power-optimized design, now the IEEE-1801 standard also known as the Unified Low-Power Design Format (UPF). Due to the rapid update of low-power design methodology, IEEE-1801 has undergone 4 major updates since the first version was launched in 2008. The compatibility issues between different versions make this standard the most difficult to support in the EDA field. one of the standards.
Innodata LPC adopts a new product architecture and builds a core power intent data structure based on the latest UPF3.1 information model, which can help IC design engineers build a customized static verification process using LPC as a platform.
0 Comments