Innodata released the first self-developed low-power design verification EDA tool

Recently, Innodata released the first self-developed EDA tool - EnFortius   Low Power Checker (LPC for short), LPC is mainly used for static verification of low-power design and can be used for integrated circuits. (IC) Engineers quickly locate possible design vulnerabilities and flaws introduced by low-power designs.

Innodata  EnFortius series of tools are designed to solve the low-power design problems faced by chip design engineers, and the LPC released this time is the first tool in the series. Years ago, in response to the need for low-power designs, the industry developed a design standard for power-optimized design, now the IEEE-1801 standard also known as the Unified Low-Power Design Format (UPF). Due to the rapid update of low-power design methodology, IEEE-1801 has undergone 4 major updates since the first version was launched in 2008. The compatibility issues between different versions make this standard the most difficult to support in the EDA field. one of the standards.


Innodata LPC adopts a new product architecture and builds a core power intent data structure based on the latest UPF3.1 information model, which can help IC design engineers build a customized static verification process using LPC as a platform.

Innodata (Chengdu) Electronic Technology Co., Ltd. is a local EDA company. In order to improve the efficiency of chip design and solve the problem of massive computing resources required for system-level chip verification, Innova has established the first EDA hardware verification cloud platform exclusively authorized by Cadence in China. Innova's main business also includes chip design services based on complete solutions and digital mid-end EDA software with fully independent intellectual property rights. The company's long-term goal is to explore the path and model of industrial software cloud migration suitable for China's national conditions through the practice of EDA software and hardware to the cloud, relying on the research and development of local EDA software and IP, and to empower the high-quality development of the semiconductor industry.

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